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Micropower Single-Supply Rail-to-Rail Input/Output Op Amps OP191/OP291/OP491
FEATURES
Single-supply operation: 2.7 V to 12 V Wide input voltage range Rail-to-rail output swing Low supply current: 300 A/amp Wide bandwidth: 3 MHz Slew rate: 0.5 V/s Low offset voltage: 700 V No phase reversal
NC 1 -INA 2 +INA 3 -V 4
PIN CONFIGURATIONS
8
NC +V OUTA
00294-001
OUTA 1 -INA 2 +INA 3 -V 4
8
+V OUTB +INB
00294-002 00294-004
OP191
7 6 5
OP291
7 6 5
-INB
NC
NC = NO CONNECT
Figure 1. 8-Lead Narrow-Body SOIC
OUTA 1 -INA 2 +INA 3 +V 4 +INB 5 -INB 6 OUTB 7
14 13 12
Figure 2. 8-Lead Narrow-Body SOIC
OUTD -IND +IND -V +INC
00294-003
OUTA 1 -INA 2 +INA 3 +V 4 +INB 5 OUTB 7
+ + + + -
14 13 12
OUTD -IND +IND -V +INC -INC OUTC
APPLICATIONS
Industrial process control Battery-powered instrumentation Power supply control and protection Telecommunications Remote sensors Low voltage strain gage amplifiers DAC output amplifiers
OP491
11 10 9 8
OP491
11 10 9 8
-INC OUTC
-INB 6
Figure 3. 14-Lead Narrow-Body SOIC
OUTA -INA +INA +V +INB -INB OUTB
1 2 3 4 5 6 7 14 13 12
Figure 4. 14-Lead PDIP
OUTD -IND +IND -V +INC OUTC
00294-005
OP491
11 10 9 8
-INC
Figure 5. 14-Lead TSSOP
GENERAL DESCRIPTION
The OP191, OP291, and OP491 are single, dual, and quad micropower, single-supply, 3 MHz bandwidth amplifiers featuring rail-to-rail inputs and outputs. All are guaranteed to operate from a +3 V single supply as well as 5 V dual supplies. Fabricated on Analog Devices CBCMOS process, the OPx91 family has a unique input stage that allows the input voltage to safely extend 10 V beyond either supply without any phase inversion or latch-up. The output voltage swings to within millivolts of the supplies and continues to sink or source current all the way to the supplies. Applications for these amplifiers include portable telecommunications equipment, power supply control and protection, and interface for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezo electric, and resistive transducers.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios. The OP191/OP291/OP491 are specified over the extended industrial -40C to +125C temperature range. The OP191 single and OP291 dual amplifiers are available in 8-lead plastic SOIC surface-mount packages. The OP491 quad is available in a 14-lead PDIP, a narrow 14-lead SOIC package, and a 14-lead TSSOP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
OP191/OP291/OP491 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Specifications............................................................... 3 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 ESD Caution.................................................................................. 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 17 Input Overvoltage Protection ................................................... 18 Output Voltage Phase Reversal................................................. 18 Overdrive Recovery ................................................................... 18 Applications..................................................................................... 19 Single 3 V Supply, Instrumentation Amplifier ....................... 19 Single-Supply RTD Amplifier................................................... 19 A 2.5 V Reference from a 3 V Supply ...................................... 20 5 V Only, 12-Bit DAC Swings Rail-to-Rail ............................. 20 A High-Side Current Monitor .................................................. 20 A 3 V, Cold Junction Compensated Thermocouple Amplifier ....................................................................................................... 21 Single-Supply, Direct Access Arrangement for Modems...... 21 3 V, 50 Hz/60 Hz Active Notch Filter with False Ground..... 22 Single-Supply, Half-Wave, and Full-Wave Rectifiers............. 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 24
REVISION HISTORY
4/06--Rev. C to Rev. D Changes to Noise Performance, Voltage Density, Table 1........... 3 Changes to Noise Performance, Voltage Density, Table 2........... 4 Changes to Noise Performance, Voltage Density, Table 3........... 5 Changes to Figure 23 and Figure 24............................................. 10 Changes to Figure 42...................................................................... 13 Changes to Figure 43...................................................................... 14 Changes to Figure 57...................................................................... 16 Added Figure 58.............................................................................. 16 Changed Reference from Figure 47 to Figure 12........................ 17 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 24 3/04--Rev. B to Rev. C. Changes to OP291 SOIC Pin Configuration .................................1 11/03--Rev. A to Rev. B. Edits to General Description ...........................................................1 Edits to Pin Configuration ...............................................................1 Changes to Ordering Guide .............................................................5 Updated Outline Dimensions....................................................... 19 12/02--Rev. 0 to Rev. A. Edits to General Description ...........................................................1 Edits to Pin Configuration ...............................................................1 Changes to Ordering Guide .............................................................5 Edits to Dice Characteristics............................................................5
Rev. D | Page 2 of 24
OP191/OP291/OP491 SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
@ VS = 3.0 V, VCM = 0.1 V, VO = 1.4 V, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage OP191G OP291G/OP491G Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage High Symbol Conditions Min Typ Max Unit
VOS -40C TA +125C VOS -40C TA +125C IB -40C TA +125C IOS -40C TA +125C CMRR AVO VOS/T IB/T IOS/T VOH RL = 100 k to GND -40C to +125C RL = 2 k to GND -40C to +125C RL = 100 k to V+ -40C to +125C RL = 2 k to V+ -40C to +125C Sink/source -40C to +125C f = 1 MHz, AV = 1 VS = 2.7 V to 12 V -40C TA +125C VO = 0 V -40C TA +125C RL = 10 k RL = 10 k 1% distortion To 0.01% 2.95 2.90 2.8 2.70 VCM = 0 V to 2.9 V -40C TA +125C RL = 10 k, VO = 0.3 V to 2.7 V -40C TA +125C 0 70 65 25
80 80 30 0.1
500 1 700 1.25 65 95 11 22 3
90 87 70 50 1.1 100 20 2.99 2.98 2.9 2.80 4.5 40
V mV V mV nA nA nA nA V dB dB V/mV V/mV V/C pA/C pA/C V V V V mV mV mV mV mA mA dB dB A A V/s V/s kHz s MHz Degrees dB V p-p nV/Hz pA/Hz
Output Voltage Low
VOL
10 35 75 130
Short-Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISC ZOUT PSRR ISY
8.75 6.0
13.50 10.5 200 110 110 200 330 0.4 0.4 1.2 22 3 45 145 2 30 0.8
80 75
350 480
+SR -SR BWP tS GBP O CS en p-p en in
f = 1 kHz, RL = 10 k 0.1 Hz to 10 Hz f = 1 kHz
Rev. D | Page 3 of 24
OP191/OP291/OP491
@ VS = 5.0 V, VCM = 0.1 V, VO = 1.4 V, TA = 25C, unless otherwise noted. +5 V specifications are guaranteed by +3 V and 5 V testing. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage OP191 OP291/OP491 Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage High Symbol Conditions Min Typ Max Unit
VOS -40C TA +125C VOS -40C TA +125C IB -40C TA +125C IOS -40C TA +125C CMRR AVO VOS/T IB/T IOS/T VOH VCM = 0 V to 4.9 V -40C TA +125C RL = 10 k, VO = 0.3 V to 4.7 V -40C TA +125C -40C TA +125C 0 70 65 25
80 80 30 0.1
500 1.0 700 1.25 65 95 11 22 5
93 90 70 50 1.1 100 20 4.99 4.98 4.85 4.75 4.5 40
V mV V mV nA nA nA nA V dB dB V/mV V/mV V/C pA/C pA/C V V V V mV mV mV mV mA mA dB dB A A V/s V/s kHz s MHz Degrees dB V p-p nV/Hz pA/Hz
Output Voltage Low
VOL
Short-Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISC ZOUT PSRR ISY
RL = 100 k to GND -40C to +125C RL = 2 k to GND -40C to +125C RL = 100 k to V+ -40C to +125C RL = 2 k to V+ -40C to +125C Sink/source -40C to +125C f = 1 MHz, AV = 1 VS = 2.7 V to 12 V -40C TA +125C VO = 0 V -40C TA +125C RL = 10 k RL = 10 k 1% distortion To 0.01%
4.95 4.90 4.8 4.65
10 35 75 155
8.75 6.0
13.5 10.5 200 110 110 220 350 0.4 0.4 1.2 22 3 45 145 2 42 0.8
80 75
400 500
+SR -SR BWP tS GBP O CS en p-p en in
f = 1 kHz, RL = 10 k 0.1 Hz to 10 Hz f = 1 kHz
Rev. D | Page 4 of 24
OP191/OP291/OP491
@ VO = 5.0 V, -4.9 V VCM +4.9 V, TA = +25C, unless otherwise noted. Table 3.
Parameter INPUT CHARACTERISTICS Offset Voltage OP191 OP291/OP491 Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing Symbol Conditions Min Typ Max Unit
VOS -40C TA +125C VOS -40C TA +125C IB -40C TA +125C IOS -40C TA +125C CMRR AVO VOS/T IB/T IOS/T VO RL = 100 k to GND -40C to +125C RL = 2 k to GND -40C TA +125C Sink/source -40C to +125C f = 1 MHz, AV = 1 VS = 5 V -40C TA +125C VO = 0 V -40C TA +125C RL = 10 k 1% distortion To 0.01% 4.93 4.90 4.80 4.65 8.75 6 VCM = 5 V -40C TA +125C RL = +10 k, VO = 4.7 V -40C TA +125C -5 75 67 25
80 80 30 0.1
500 1 700 1.25 65 95 11 22 +5
V mV V mV nA nA nA nA V dB dB V/mV V/C pA/C pA/C V V V V mA mA dB dB A A V/s kHz s MHz Degrees dB V p-p nV/Hz pA/Hz
100 97 70 50 1.1 100 20 4.99 4.98 4.95 4.75 16.00 13 200 110 100 260 390 0.5 1.2 22 3 45 145 2 42 0.8
Short-Circuit Limit Open-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Full-Power Bandwidth Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
ISC ZOUT PSRR ISY
80 75
420 550
SR BWP tS GBP O CS en p-p en in
f = 1 kHz 0.1 Hz to 10 Hz f = 1 kHz
Rev. D | Page 5 of 24
OP191/OP291/OP491
5V
100 90
INPUT OUTPUT
Vs = 5V RL = 2k AV = +1 VIN = 20V p-p
10 0%
Figure 6. Input and Output with Inputs Overdriven by 5 V
Rev. D | Page 6 of 24
00294-006
5V
200s
OP191/OP291/OP491 ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range N, R, RU Packages Operating Temperature Range OP191G/OP291G/OP491G Junction Temperature Range N, R, RU Packages Lead Temperature (Soldering, 60 sec) Rating 16 V GND to VS 10 V 7V Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
THERMAL RESISTANCE
JA is specified for the worst-case conditions; that is, JA is specified for device in socket for PDIP packages; JA is specified for device soldered in circuit board for TSSOP and SOIC packages. Table 5. Thermal Resistance
Package Type 8-Lead SOIC (R) 14-Lead PDIP (N) 14-Lead SOIC (R) 14-Lead TSSOP (RU) JA 158 76 120 180 JC 43 33 36 35 Unit C/W C/W C/W C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. D | Page 7 of 24
OP191/OP291/OP491 TYPICAL PERFORMANCE CHARACTERISTICS
180 160 140 120
UNITS
VS = 3V TA = 25C BASED ON 1200 OP AMPS
INPUT BIAS CURRENT (nA)
40 30 20 10 0 -10 -20 -30 -40
00294-012
VCM = 3V
VCM = 2.9V
100 80 60 40 20 0 -0.18 -0.10 -0.02 0.06 0.14
VS = 3V VCM = 0.1V
-50 -60 -40 25
0.22
85
125
INPUT OFFSET VOLTAGE (mV)
TEMPERATURE (C)
Figure 7. OP291 Input Offset Voltage Distribution, VS = 3 V
120 VS = 3V -40C < TA < +125C BASED ON 600 OP AMPS
Figure 10. Input Bias Current vs. Temperature, VS = 3 V
0 -0.2
INPUT OFFSET CURRENT (nA)
100
-0.4 VS = 3V -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -40 25
VCM = 0.1V VCM = 2.9V VCM = 3V
80
UNITS
60
40
VCM = 0V
20
00294-013
0
0
1
2
3
4
5
6
7
85
125
INPUT OFFSET VOLTAGE (V/C)
TEMPERATURE (C)
Figure 8. OP291 Input Offset Voltage Drift Distribution, VS = 3 V
0 VS = 3V -0.02
Figure 11. Input Offset Current vs. Temperature, VS = 3 V
36 30 VS = 3V
INPUT OFFSET VOLTAGE (mV)
VCM = 0.1V
24
INPUT BIAS CURRENT (nA)
-0.04 VCM = 0V -0.06 VCM = 3V -0.08 -0.10 -0.12 -0.14 -40 VCM = 2.9V
18 12 6 0 -6 -12 -18 -24 -30 -36 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
00294-017
25
85
125
00294-014
3.0
TEMPERATURE (C)
INPUT COMMON-MODE VOLTAGE (V)
Figure 9. Input Offset Voltage vs. Temperature, VS = 3 V
Figure 12. Input Bias Current vs. Input Common-Mode Voltage, VS = 3 V
Rev. D | Page 8 of 24
00294-016
00294-015
VCM = 0V
OP191/OP291/OP491
3.00 +VO @ RL = 100k
OUTPUT VOLTAGE SWING (V)
50 40 30
CLOSED-LOOP GAIN (dB)
VS = 3V TA = 25C
2.95
20 10 0 -10 -20 -30
2.90 +VO @ RL = 2k 2.85
2.80
00294-018
VS = 3V 2.75 -40 25 85
-50 10 100 1k 10k 100k 1M FREQUENCY (Hz)
125
10M
TEMPERATURE (C)
Figure 13. Output Voltage Swing vs. Temperature, VS = 3 V
160 140 120 OPEN-LOOP GAIN (dB) 100 80 60 40 20 0 -20 -40 100 1k 10k 100k 1M FREQUENCY (Hz) 90 45 0 -45
00294-019
Figure 16. Closed-Loop Gain vs. Frequency, VS = 3 V
160 CMRR VS = 3V TA = 25C
VS = 3V TA = 25C OPEN PHASE SHIFT (Degrees)
140 120 100
CMRR (dB)
80 60 40 20 0 -20 -40 100 1k 10k 100k 1M
00294-022
-90 10M
10M
FREQUENCY (Hz)
Figure 14. Open-Loop Gain and Phase vs. Frequency, VS = 3 V
1200 RL = 100k, VCM = 2.9V RL = 100k, VCM = 0.1V 90
Figure 17. CMRR vs. Frequency, VS = 3 V
VS = 3V 89
1000
OPEN-LOOP GAIN (V/mV)
CMRR (dB)
800
88
600
87
400
86
VS = 3V, VO = 0.3V/2.7V 0 -40 25 85
00294-020
125
84 -40
25
85
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 15. Open-Loop Gain vs. Temperature, VS = 3 V
Figure 18. CMRR vs. Temperature, VS = 3 V
Rev. D | Page 9 of 24
00294-023
200
85
00294-021
-40
OP191/OP291/OP491
160 140 120 100
PSRR (dB)
0.35 PSRR VS = 3V TA = 25C VS = 3V
SUPPLY CURRENT/AMPLIFIER (mA)
00294-024
0.30
0.25
80 +PSRR 60 40 20 0 -20 -40 100 1k 10k 100k 1M -PSRR
0.20
0.15
0.10
00294-027
10M
0.05 -40
25
85
125
FREQUENCY (Hz)
TEMPERATURE (C)
Figure 19. PSRR vs. Frequency, VS = 3 V
113 VS = 3V
MAXIMUM OUTPUT SWING (V)
Figure 22. Supply Current vs. Temperature, VS = +3 V, +5 V, 5 V
3.0 2.5 VIN = 2.8V p-p VS = 3V AV = +1 RL = 100k
112
111
PSRR (dB)
2.0
110
1.5
109
1.0
108
00294-025
0.5
00294-028
107 -40
25
85
125
0 100
1k
10k FREQUENCY (Hz)
100k
1M
TEMPERATURE (C)
Figure 20. PSRR vs. Temperature, VS = 3 V
1.6 VS = 3V +SR 1.2
SLEW RATE (V/s)
VOLTAGE NOISE DENSITY (nV/ Hz)
Figure 23. Maximum Output Swing vs. Frequency, VS = 3 V
1k
1.4
1.0 0.8 0.6 0.4 -SR
00294-026
100
0 -40
10
25
85
125
10
100
1k FREQUENCY (Hz)
10k
TEMPERATURE (C)
Figure 21. Slew Rate vs. Temperature, VS = 3 V
Figure 24. Voltage Noise Density, VS = 5 V or 5 V
Rev. D | Page 10 of 24
00294-029
0.2
OP191/OP291/OP491
70 60 50 40 30 20 10 0 -0.50 VS = 5V TA = 25C BASED ON 600 OP AMPS 40 30 VCM = 5V 20 10
IB (nA)
VS = 5V
+IB -IB
UNITS
0 -10 -20
VCM = 0V
00294-030
+IB 25 85
-0.30
-0.10
0.10
0.30
0.50
-40 -40
125
INPUT OFFSET VOLTAGE (mV)
TEMPERATURE (C)
Figure 25. OP291 Input Offset Voltage Distribution, VS = 5 V
120 VS = 5V -40C < TA < +125C BASED ON 600 OP AMPS
1.6 1.4
Figure 28. Input Bias Current vs. Temperature, VS = 5 V
VS = 5V
INPUT OFFSET CURRENT (nA)
100
1.2 1.0 VCM = 0V 0.8 0.6 0.4 0.2 VCM = 5V 25 85 125
00294-034
80
UNITS
60
40
20
00294-031
0 -0.2 -40
0
0
1
2
3
4
5
6
7
INPUT OFFSET VOLTAGE (V/C)
TEMPERATURE (C)
Figure 26. OP291 Input Offset Voltage Drift Distribution, VS = 5 V
0.15 VS = 5V 0.10 VCM = 0V
VOS (mV)
Figure 29. Input Offset Current vs. Temperature, VS = 5 V
36 30 24 VS = 5V
INPUT BIAS CURRENT (nA)
18 12 6 0 -6 -12 -18 -24
00294-035
0.05
0
-0.05
VCM = 5V
00294-032
-30 -36 0 1 2 3 4 5
-0.10 -40
25
85
125
TEMPERATURE (C)
COMMON-MODE INPUT VOLTAGE (V)
Figure 27. Input Offset Voltage vs. Temperature, VS = 5 V
Figure 30. Input Bias Current vs. Common-Mode Input Voltage, VS = 5 V
Rev. D | Page 11 of 24
00294-033
-30
-IB
OP191/OP291/OP491
5.00 RL = 100k 50 40 30 VS = 5V TA = 25C
OUTPUT VOLTAGE SWING (V)
4.95
CLOSED-LOOP GAIN (dB)
00294-036
4.90
20 10 0 -10 -20 -30
4.85 RL = 2k 4.80
4.75 VS = 5V 4.70 -40 25 85
-50 10 100 1k 10k 100k 1M FREQUENCY (Hz)
125
10M
TEMPERATURE (C)
Figure 31. Output Voltage Swing vs. Temperature, VS = 5 V
160 140 120 OPEN-LOOP GAIN (dB) 100 80 60 40 20 0 -20 -40 100 1k 10k 100k 1M FREQUENCY (Hz) 90 45 0 -45
00294-037
Figure 34. Closed-Loop Gain vs. Frequency, VS = 5 V
160 CMRR VS = 5V TA = 25C
VS = 5V TA = 25C OPEN PHASE SHIFT (Degrees)
140 120 100
CMRR (dB)
80 60 40 20 0 -20 -40 100 1k 10k 100k 1M
00294-040
-90 10M
10M
FREQUENCY (Hz)
Figure 32. Open-Loop Gain and Phase vs. Frequency, VS = 5 V
140 VS = 5V 120 RL = 100k, VCM = 5V
Figure 35. CMRR vs. Frequency, VS = 5V
96 95 94 93
CMRR (dB)
VS = 5V
OPEN-LOOP GAIN (V/mV)
100 80 60 40 20 0 -40 RL = 2k, VCM = 0V 25 85
92 91 90 89
RL = 100k, VCM = 0V RL = 2k, VCM = 5V
00294-038
88 87 86 -40 25 85
00294-041
125
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 33. Open-Loop Gain vs. Temperature, VS = 5 V
Figure 36. CMRR vs. Temperature, VS = 5 V
Rev. D | Page 12 of 24
00294-039
-40
OP191/OP291/OP491
160 140 120 100
PSRR (dB)
20 PSRR VS = 5V TA = 25C 18
SHORT-CIRCUIT CURRENT (mA)
+ISC, VS = 5V -ISC, VS = 5V
16 14 12 10 8 +ISC, VS = +3V
80 60 40 20 0 -20 -40 100 1k 10k
+PSRR
-PSRR
-ISC, VS = +3V
00294-042
100k
1M
10M
4 -40
25
85
125
FREQUENCY (Hz)
TEMPERATURE (C)
Figure 37. PSRR vs. Frequency, VS = 5 V
0.6
Figure 40. Short-Circuit Current vs. Temperature, VS = +3 V, +5 V, 5 V
80 VS = 5V 70 60
VOLTAGE (V)
0.5
0.4
SR (V/s)
50 40 30 20 10k A B 10k VIN = 10V p-p @ 1kHz 0 500 1000 1500 2000 1k VO
00294-046
+SR 0.3
-SR
0.2
0.1 VS = 5V 0 -40 25 85
00294-043
10 0
125
2500
TEMPERATURE (C)
FREQUENCY (Hz)
Figure 38. OP291 Slew Rate vs. Temperature, VS = 5 V
0.50 0.45 0.40 0.35
SR (V/s)
Figure 41. Channel Separation, VS = 5 V
5.0 VIN = 4.8V p-p VS = 5V AV = +1 RL = 100k
VS = 5V
MAXIMUM OUTPUT SWING (V)
4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100
+SR -SR
0.30 0.25 0.20 0.15 0.10 0.05 0 -40 25
00294-044
85
125
1k
10k
FREQUENCY (Hz)
100k
1M
TEMPERATURE (C)
Figure 39. OP491 Slew Rate vs. Temperature, VS = 5 V
Figure 42. Maximum Output Swing vs. Frequency, VS = 5 V
Rev. D | Page 13 of 24
00294-047
00294-045
6
OP191/OP291/OP491
10 VIN = 9.8V p-p VS = 5V AV = +1 RL = 100k 1.6 1.4
INPUT OFFSET CURRENT (nA)
VS = 5V
MAXIMUM OUTPUT SWING (V)
8
1.2 VCM = -5V 1.0 0.8 0.6 0.4 0.2 0 -0.2 -40 25 85 125
6
4
2
00294-048
VCM = +5V
00294-051
0 100
1k
10k FREQUENCY (Hz)
100k
1M
TEMPERATURE (C)
Figure 43. Maximum Output Swing vs. Frequency, VS = 5 V
0.15 VS = 5V 0.10 VCM= -5V 0.05
INPUT BIAS CURRENT (nA)
Figure 46. Input Offset Current vs. Temperature, VS = 5 V
36 VS = 5V 24
INPUT OFFSET VOLTAGE (mV)
12
0
0
-12
-0.05
VCM = +5V
00294-049
-24
00294-052
-0.10 -40
25
85
125
-36
-5
-4
-3
-2
-1
0
1
2
3
4
5
TEMPERATURE (C)
COMMON-MODE INPUT VOLTAGE (V)
Figure 44. Input Offset Voltage vs. Temperature, VS = 5 V
50 40 30 20 10
IB (nA)
Figure 47. Input Bias Current vs. Common-Mode Voltage, VS = 5 V
5.00 RL = 2k
VS = 5V +IB VCM = +5V -IB
OUTPUT VOLTAGE SWING (V)
4.95 4.90 4.85 4.80 4.75 0 -4.75 -4.80 -4.85 -4.90
00294-050
RL = 2k VS = 5V
0 -10 -20 -30 -40 -50 -40 25 85 VCM = -5V
-IB +IB
RL = 2k RL = 2k 25 85
00294-053
-4.95 -5.00 -40
125
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 45. Input Bias Current vs. Temperature, VS = 5 V
Figure 48. Output Voltage Swing vs. Temperature, VS = 5 V
Rev. D | Page 14 of 24
OP191/OP291/OP491
70 60 50 40 30 20 10 0 -10 -20 -30 1k 10k 100k FREQUENCY (Hz) 1M 10M VS = 5V TA = 25C 160 140 120 CMRR VS = 5V TA = 25C
PHASE SHIFT (Degrees)
OPEN-LOOP GAIN (dB)
0 45 90 135 180 225 270
100
CMRR (dB)
80 60 40 20 0 -20
00294-057
00294-054
-40 100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 49. Open-Loop Gain and Phase vs. Frequency, VS = 5 V
200 180 160 RL = 2k VS = 5V 102
Figure 52. CMRR vs. Frequency, VS = 5 V
VS = 5V 101 100 99
OPEN-LOOP GAIN (V/mV)
140
100 80 65 40
00294-055
CMRR (dB)
RL = 2k
120
98 97 96 95 94 93 92 -40 25 85
00294-058
25 0 -40 25
85
125
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 50. Open-Loop Gain vs. Temperature, VS = 5 V
50 40 30 VS = 5V TA = 25C 160 140 120 100
Figure 53. CMRR vs. Temperature, VS = 5 V
PSRR VS = 5V TA = 25C
CLOSED-LOOP GAIN (dB)
20
PSRR (dB)
10 0 -10 -20 -30
00294-056
80 60 40 20 0 -20 -40 100 1k 10k -PSRR
+PSRR
-50 10 100 1k 10k 100k 1M FREQUENCY (Hz)
10M
100k
1M
10M
FREQUENCY (Hz)
Figure 51. Closed-Loop Gain vs. Frequency, VS = 5 V
Figure 54. PSRR vs. Frequency, VS = 5 V
Rev. D | Page 15 of 24
00294-059
-40
OP191/OP291/OP491
115 VS = 5V 110 OP291
VOLTAGE NOISE DENSITY (nV/ Hz)
1k
OP491
PSRR (dB)
105
100
100
95
00294-060
90 -40
10
25
85
125
10
100
1k FREQUENCY (Hz)
10k
TEMPERATURE (C)
Figure 55. OP291/OP491 PSRR vs. Temperature, VS = 5 V
0.7 VS = 5V 0.6 +SR 0.5 -SR
100 90
Figure 58. Voltage Noise Density, VS = 3 V
1.00V
SR (V/s)
0.4 0.3 0.2 0.1 0 -40
OUTPUT
00294-061
INPUT
10 0%
V S = 3V R L = 200k 500mV 2.00s 100mV
00294-063
25
85
125
TEMPERATURE (C)
Figure 56. Slew Rate vs. Temperature, VS = 5 V
1k VS = 3V
Figure 59. Large Signal Transient Response, VS = 3 V
2.00V
100
AV = +100
OUTPUT IMPEDANCE ()
100 AV = +10 10 AV = +1
90
INPUT
1
00294-062
10
OUTPUT
V S = 5V R L = 200k A V = +1V/V 1.00V 2.00s 100mV
00294-064
0%
0.1 1k
10k
100k FREQUENCY (Hz)
1M
2M
Figure 57. Output Impedance vs. Frequency
Figure 60. Large Signal Transient Response, VS = 5 V
Rev. D | Page 16 of 24
00294-078
OP191/OP291/OP491 THEORY OF OPERATION
The OP191/OP291/OP491 are single-supply, micropower amplifiers featuring rail-to-rail inputs and outputs. To achieve wide input and output ranges, these amplifiers employ unique input and output stages. In Figure 61 , the input stage comprises two differential pairs, a PNP pair and an NPN pair. These two stages do not work in parallel. Instead, only one stage is on for any given input signal level. The PNP stage (Transistor Q1 and Transistor Q2) is required to ensure that the amplifier remains in the linear region when the input voltage approaches and reaches the negative rail. On the other hand, the NPN stage (Transistor Q5 and Transistor Q6) is needed for input voltages up to and including the positive rail. For the majority of the input common-mode range, the PNP stage is active, as is shown in Figure 12. Notice that the bias current switches direction at approximately 1.2 V to 1.3 V below the positive rail. At voltages below this, the bias current flows out of the OP291, indicating a PNP input stage. Above this voltage, however, the bias current enters the device, revealing the NPN stage. The actual mechanism within the amplifier for switching between the input stages comprises Transistor Q3, Transistor Q4, and Transistor Q7. As the input common-mode voltage increases, the emitters of Q1 and Q2 follow that voltage plus a diode drop. Eventually, the emitters of Q1 and Q2 are high enough to turn on Q3, which diverts the 8 A of tail current away from the PNP input stage, turning it off. Instead, the current is mirrored through Q4 and Q7 to activate the NPN input stage. Notice that the input stage includes 5 k series resistors and differential diodes, a common practice in bipolar amplifiers to protect the input transistors from large differential voltages. These diodes turn on whenever the differential voltage exceeds approximately 0.6 V. In this condition, current flows between the input pins, limited only by the two 5 k resistors. This characteristic is important in circuits where the amplifier may be operated open-loop, such as a comparator. Evaluate each circuit carefully to make sure that the increase in current does not affect the performance. The output stage in OP191 devices uses a PNP and an NPN transistor, as do most output stages; however, Q32 and Q33, the output transistors, are actually connected with their collectors to the output pin to achieve the rail-to-rail output swing. As the output voltage approaches either the positive or negative rail, these transistors begin to saturate. Thus, the final limit on output voltage is the saturation voltage of these transistors, which is about 50 mV. The output stage does have inherent gain arising from the collectors and any external load impedance. Because of this, the open-loop gain of the amplifier is dependent on the load resistance.
8A -IN
Q22
Q26 Q32
Q23 5k Q3 Q1 Q2 5k Q5 Q6 Q8 Q10 Q12 Q14 Q16 Q17 Q21 Q9 Q11 Q13 Q15 Q24 Q20
Q27 Q30 10pF Q31 Q28 VOUT
+IN
Q18 Q4 Q7
Q19
Q25
Q29
Q33
00294-065
Figure 61. Simplified Schematic
Rev. D | Page 17 of 24
OP191/OP291/OP491
INPUT OVERVOLTAGE PROTECTION
As with any semiconductor device, whenever the condition exists for the input to exceed either supply voltage, check the input overvoltage characteristic. When an overvoltage occurs, the amplifier could be damaged depending on the voltage level and the magnitude of the fault current. Figure 62 shows the characteristics for the OP191 family. This graph was generated with the power supplies at ground and a curve tracer connected to the input. When the input voltage exceeds either supply by more than 0.6 V, internal PN junctions energize, allowing current to flow from the input to the supplies. As described, the OP291/OP491 do have 5 k resistors in series with each input to help limit the current. Calculating the slope of the current vs. voltage in the graph confirms the 5 k resistor.
IIN +2mA
OUTPUT VOLTAGE PHASE REVERSAL
Some operational amplifiers designed for single-supply operation exhibit an output voltage phase reversal when their inputs are driven beyond their useful common-mode range. Typically, for single-supply bipolar op amps, the negative supply determines the lower limit of their common-mode range. With these devices, external clamping diodes with the anode connected to ground and the cathode to the inputs prevent input signal excursions from exceeding the device's negative supply (that is, GND), preventing a condition that could cause the output voltage to change phase. JFET input amplifiers can also exhibit phase reversal, and, if so, a series input resistor is usually required to prevent it. The OP191 is free from reasonable input voltage range restrictions due to its novel input structure. In fact, the input signal can exceed the supply voltage by a significant amount without causing damage to the device. As shown in Figure 64, the OP191 family can safely handle a 20 V p-p input signal on 5 V supplies without exhibiting any sign of output voltage phase reversal or other anomalous behavior. Thus, no external clamping diodes are required.
+1mA
-10V
-5V
+5V
+10V VIN
OVERDRIVE RECOVERY
-1mA
-2mA
Figure 62. Input Overvoltage Characteristics
This input current is not inherently damaging to the device as long as it is limited to 5 mA or less. For an input of 10 V over the supply, the current is limited to 1.8 mA. If the voltage is large enough to cause more than 5 mA of current to flow, then an external series resistor should be added. The size of this resistor is calculated by dividing the maximum overvoltage by 5 mA and subtracting the internal 5 k resistor. For example, if the input voltage could reach 100 V, the external resistor should be (100 V/5 mA) - 5 k = 15 k. This resistance should be placed in series with either or both inputs if they are subjected to the overvoltages.
The overdrive recovery time of an operational amplifier is the time required for the output voltage to recover to its linear region from a saturated condition. This recovery time is important in applications where the amplifier must recover quickly after a large transient event, such as a comparator. The circuit shown in Figure 63 was used to evaluate the OPx91 overdrive recovery time. The OPx91 takes approximately 8 s to recover from positive saturation and approximately 6.5 s to recover from negative saturation.
R1 9k VIN 10V STEP R2 10k VS = 5V
3+
00294-066
OP291
2-
1/2
1
VOUT
00294-068
R3 10k
Figure 63. Overdrive Recovery Time Test Circuit
5s +5V VIN 20V p-p
8 100 90 100 90
5s
3
+
2
OP291 -
4
1/2
1
VOUT
VOUT (2V/DIV)
10 0% 10 0%
-5V
00294-067
VIN (2.5V/DIV)
20mV TIME (200s/DIV) TIME (200s/DIV)
20mV
Figure 64. Output Voltage Phase Reversal Behavior
Rev. D | Page 18 of 24
OP191/OP291/OP491 APPLICATIONS
SINGLE 3 V SUPPLY, INSTRUMENTATION AMPLIFIER
The OP291 low supply current and low voltage operation make it ideal for battery-powered applications, such as the instrumentation amplifier shown in Figure 65. The circuit uses the classic two op amp instrumentation amplifier topology, with four resistors to set the gain. The equation is simply that of a noninverting amplifier, as shown in Figure 65. The two resistors labeled R1 should be closely matched both to each other and to the two resistors labeled R2 to ensure good common-mode rejection performance. Resistor networks ensure the closest matching as well as matched drifts for good temperature stability. Capacitor C1 is included to limit the bandwidth and, therefore, the noise in sensitive applications. The value of this capacitor should be adjusted depending on the desired closedloop bandwidth of the instrumentation amplifier. The RC combination creates a pole at a frequency equal to 1/(2 x R1C1). If AC-CMRR is critical, then a matched capacitor to C1 should be included across the second resistor labeled R1.
3V + VIN -
3 2 5 6 8
SINGLE-SUPPLY RTD AMPLIFIER
The circuit in Figure 66 uses three op amps of the OP491 to develop a bridge configuration for an RTD amplifier that operates from a single 5 V supply. The circuit takes advantage of the OP491 wide output swing range to generate a high bridge excitation voltage of 3.9 V. In fact, because of the rail-to-rail output swing, this circuit works with supplies as low as 4.0 V. Amplifier A1 servos the bridge to create a constant excitation current in conjunction with the AD589, a 1.235 V precision reference. The op amp maintains the reference voltage across the parallel combination of the 6.19 k and 2.55 M resistors, which generate a 200 A current source. This current splits evenly and flows through both halves of the bridge. Thus, 100 A flows through the RTD to generate an output voltage based on its resistance. A 3-wire RTD is used to balance the line resistance in both 100 legs of the bridge to improve accuracy.
GAIN = 274 5V
200 10 TURNS 26.7k 100 RTD 2.55M 100 26.7k
A3 A2
OP291
4
1/2
OP491
1/4
VOUT
7
VOUT
OP491
365 365 100k
1/4
OP291
R2
1/2
1
6.19k
A1
R1
R2
R1
00294-069
OP491
AD589 37.4k
1/4
100k 0.01pF ALL RESISTORS 1% OR BETTER
00294-070
VOUT = (1 +
R1 ) = VIN R2
C1 100pF
Figure 65. Single 3 V Supply Instrumentation Amplifier
5V
Because the OP291 accepts rail-to-rail inputs, the input common-mode range includes both ground and the positive supply of 3 V. Furthermore, the rail-to-rail output range ensures the widest signal range possible and maximizes the dynamic range of the system. Also, with its low supply current of 300 A/device, this circuit consumes a quiescent current of only 600 A yet still exhibits a gain bandwidth of 3 MHz. A question may arise about other instrumentation amplifier topologies for single-supply applications. For example, a variation on this topology adds a fifth resistor between the two inverting inputs of the op amps for gain setting. While that topology works well in dual-supply applications, it is inherently inappropriate for single-supply circuits. The same could be said for the traditional three op amp instrumentation amplifier. In both cases, the circuits simply cannot work in single-supply situations unless a false ground between the supplies is created.
Figure 66. Single-Supply RTD Amplifier
Amplifier A2 and Amplifier A3 are configured in the two op amp instrumentation amplifier topology described in the Single 3 V Supply, Instrumentation Amplifier section. The resistors are chosen to produce a gain of 274, such that each 1C increase in temperature results in a 10 mV change in the output voltage, for ease of measurement. A 0.01 F capacitor is included in parallel with the 100 k resistor on Amplifier A3 to filter out any unwanted noise from this high gain circuit. This particular RC combination creates a pole at 1.6 kHz.
Rev. D | Page 19 of 24
OP191/OP291/OP491
A 2.5 V REFERENCE FROM A 3 V SUPPLY
In many single-supply applications, the need for a 2.5 V reference often arises. Many commercially available monolithic 2.5 V references require a minimum operating supply voltage of 4 V. The problem is exacerbated when the minimum operating system supply voltage is 3 V. The circuit illustrated in Figure 67 is an example of a 2.5 V reference that operates from a single 3 V supply. The circuit takes advantage of the OP291 rail-to-rail input and output voltage ranges to amplify an AD589 1.235 V output to 2.5 V. The OP291 low TCVOS of 1 V/C helps maintain an output voltage temperature coefficient of less than 200 ppm/C. The circuit overall temperature coefficient is dominated by the temperature coefficient of R2 and R3. Lower temperature coefficient resistors are recommended. The entire circuit draws less than 420 A from a 3 V supply at 25C.
3V R1 17.4k 3 3V 8 1/2 4
The OP291 serves two functions. First, it is required to buffer the high output impedance of the DAC VREF pin, which is on the order of 10 k. The op amp provides a low impedance output to drive any following circuitry. Second, the op amp amplifies the output signal to provide a rail-to-rail output swing. In this particular case, the gain is set to 4.1 to generate a 5.0 V output when the DAC is at full scale. If other output voltage ranges are needed, such as 0 V to 4.095 V, the gain can easily be adjusted by altering the value of the resistors.
A HIGH-SIDE CURRENT MONITOR
In the design of power supply control circuits, a great deal of design effort is focused on ensuring a pass transistor's longterm reliability over a wide range of load current conditions. As a result, monitoring and limiting device power dissipation is of prime importance in these designs. The circuit illustrated in Figure 69 is an example of a 5 V, single-supply, high-side current monitor that can be incorporated into the design of a voltage regulator with fold-back current limiting or a high current power supply with crowbar protection. This design uses an OP291 rail-to-rail input voltage range to sense the voltage drop across a 0.1 current shunt. A p-channel MOSFET used as the feedback element in the circuit converts the op amp differential input voltage into a current. This current is then applied to R2 to generate a voltage that is a linear representation of the load current. The transfer equation for the current monitor is given by
AD589
2
OP291
1
2.5VREF RESISTORS = 1%, 100ppm/C POTENTIOMETER = 10 TURN, 100ppm/C
R3 100k
R2 100k
R1 5k
Figure 67. A 2.5 V Reference that Operates on a Single 3 V Supply
5 V ONLY, 12-BIT DAC SWINGS RAIL-TO-RAIL
The OPx91 family is ideal for use with a CMOS DAC to generate a digitally controlled voltage with a wide output range. Figure 68 shows the DAC8043 used in conjunction with the AD589 to generate a voltage output from 0 V to 1.23 V. The DAC is operated in voltage switching mode, where the reference is connected to the current output, IOUT, and the output voltage is taken from the VREF pin. This topology is inherently noninverting as opposed to the classic current output mode, which is inverting and, therefore, unsuitable for single supply.
5V 8 VDD 3 IOUT DAC8043 RFB VREF 2 1 5V GND CLK SR1 LD AD589 4 7 6 5
3 8
00294-071
R Monitor Output = R2 x SENSE x I L R1 For the element values shown, the monitor output transfer characteristic is 2.5 V/A.
RSENSE 0.1 5V 5V R1 100
3 8
IL 5V
R1 17.8k 1.23V
OP291
2 4
1/2
1
DIGITAL CONTROL
OP291
2 4
1/2
1
D VOUT = ---- (5V) 4096
MONITOR OUTPUT
D R2 2.49k
Figure 69. A High-Side Load Current Monitor
R3 232 1% R2 32.4k 1% R4 100k 1%
Figure 68. 5 V Only, 12-Bit DAC Swings Rail-to-Rail
00294-072
Rev. D | Page 20 of 24
00294-073
3N163
S M1
G
OP191/OP291/OP491
A 3 V, COLD JUNCTION COMPENSATED THERMOCOUPLE AMPLIFIER
The OP291 low supply operation makes it ideal for 3 V batterypowered applications such as the thermocouple amplifier shown in Figure 70. The K-type thermocouple terminates in an isothermal block where the junction ambient temperature is continuously monitored using a simple 1N914 diode. The diode corrects the thermal EMF generated in the junctions by feeding a small voltage, scaled by the 1.5 M and 475 resistors, to the op amp. To calibrate this circuit, immerse the thermocouple measuring junction in a 0C ice bath and adjust the 500 potentiometer to 0 V out. Next, immerse the thermocouple in a 250C temperature bath or oven and adjust the scale adjust potentiometer for an output voltage of 2.50 V. Within this temperature range, the K-type thermocouple is accurate to within 3C without linearization.
1.235V AD589 ISOTHERMAL BLOCK 7.15k 1N914 1% ALUMEL AL COLD JUNCTIONS CR CHROMEL K-TYPE THERMOCOUPLE 40.7V/C 11.2mV 475 1% 2.1k 1% 500 10 TURN ZERO ADJUST
3
The transmit signal, TXA, is inverted by A2 and then reinverted by A3 to provide a differential drive to the transformer, where each amplifier supplies half the drive signal. This is needed because of the smaller swings associated with a single supply as opposed to a dual supply. Amplifier A1 provides some gain for the received signal, and it also removes the transmit signal present at the transformer from the received signal. To do this, the drive signal from A2 is also fed to the noninverting input of A1 to cancel the transmit signal from the transformer.
390pF 37.4k 0.1F RXA
14
A1 1/4
20k,1%
13
OP491
12
0.0047F 3.3k
10
20k,1%
A2 1/4
8
475,1%
10k
OP491
3.0V SCALE ADJUST 1.33M 20k
9
37.4k,1% 0.1F TXA 20k,1% 750pF 20k,1% 0.033F
T1
24.3k 1% 24.9k 1% 4.99k 1%
2
1.5M 1%
1:1
8
OP291
4
1/2
VOUT
1
20k,1%
6
A3
5.1V TO 6.2V ZENER 5
7
0V = 0C 3V = 300C
5
00294-074
OP491
1/4
3V OR 5V
Figure 70. A 3 V, Cold Junction Compensated Thermocouple Amplifier
4 1
2
SINGLE-SUPPLY, DIRECT ACCESS ARRANGEMENT FOR MODEMS
An important building block in modems is the telephone line interface. In the circuit shown in Figure 71, a direct access arrangement is used to transmit and receive data from the telephone line. Amplifier A1 is the receiving amplifier; Amplifier A2 and Amplifier A3 are the transmitters. The fourth amplifier, A4, generates a pseudo ground halfway between the supply voltage and ground. This pseudo ground is needed for the ac-coupled bipolar input signals.
OP491
11 3
1/4
100k
A4
100k
10F
0.1F
00294-075
Figure 71. Single-Supply, Direct Access Arrangement for Modems
The OP491 bandwidth of 3 MHz and rail-to-rail output swings ensure that it can provide the largest possible drive to the transformer at the frequency of transmission.
Rev. D | Page 21 of 24
OP191/OP291/OP491
3 V, 50 HZ/60 HZ ACTIVE NOTCH FILTER WITH FALSE GROUND
To process ac signals in a single-supply system, it is often best to use a false ground biasing scheme. Figure 72 illustrates a circuit that uses this approach. In this circuit, a false-ground circuit biases an active notch filter used to reject 50 Hz/60 Hz power line interference in portable patient monitoring equipment. Notch filters are quite commonly used to reject power line frequency interference that often obscures low frequency physiological signals, such as heart rates, blood pressure readings, EEGs, and EKGs. This notch filter effectively squelches 60 Hz pickup at a filter Q of 0.75. Substituting 3.16 k resistors for the 2.67 k resistors in the twin-T section (R1 through R5) configures the active filter to reject 50 Hz interference.
R2 2.67k 3V 11 R1 2.67k C1 1F 1 A1 R3 2.67k C3 2F (1F x 2) R11 100k C5 3V R9 1M 9 0.01F 1/4 R12 499 8 C6 1.5V 1F
00294-076
The filter section uses a pair of OP491s in a twin-T configuration whose frequency selectivity is very sensitive to the relative matching of the capacitors and resistors in the twin-T section. Mylar is the material of choice for the capacitors, and the relative matching of the capacitors and resistors determines the pass band symmetry of the filter. Using 1% resistors and 5% capacitors produces satisfactory results.
SINGLE-SUPPLY, HALF-WAVE, AND FULL-WAVE RECTIFIERS
An OPx91 device configured as a voltage follower operating on a single supply can be used as a simple half-wave rectifier in low frequency (<2 kHz) applications. A full-wave rectifier can be configured with a pair of OP291s, as illustrated in Figure 73. The circuit works in the following way. When the input signal is above 0 V, the output of Amplifier A1 follows the input signal. Because the noninverting input of Amplifier A2 is connected to the output of A1, op amp loop control forces the inverting input of the A2 to the same potential. The result is that both terminals of R1 are equipotential; that is, no current flows. Because there is no current flow in R1, the same condition exists for R2; thus, the output of the circuit tracks the input signal. When the input signal is below 0 V, the output voltage of A1 is forced to 0 V. This condition now forces A2 to operate as an inverting voltage follower because the noninverting terminal of A2 is also at 0 V. The output voltage at VOUTA is then a full-wave rectified version of the input signal. If needed, a buffered, half-wave rectified version of the input signal is available at VOUTB.
R1 100k 5V VIN 2V p-p <2kHz
2 3 8
2 VIN 3
OP491
4
1/4
C2 1F R4 2.67k R5 1.33k (2.67k / 2) 5 1/4 VOUT 7
OP491
6 A2 R7 1k
R6 100k
R8 1k
R2 100k
OP491
C4 1F 10 R10 1M A3
6
OP291
4
1/2
OP291
1 5
1/2
VOUTA
7
A2
FULL-WAVE RECTIFIED OUTPUT
A1 VOUTB HALF-WAVE RECTIFIED OUTPUT
Figure 72. A 3 V Single-Supply, 50 Hz/60 Hz Active Notch Filter with False Ground
Amplifier A3 is the heart of the false ground bias circuit. It buffers the voltage developed by R9 and R10 and is the reference for the active notch filter. Because the OP491 exhibits a rail-to-rail input common-mode range, R9 and R10 are chosen to split the 3 V supply symmetrically. An in-the-loop compensation scheme used around the OP491 allows the op amp to drive C6, a 1 F capacitor, without oscillation. C6 maintains a low impedance ac ground over the operating frequency range of the filter.
VIN (1V/DIV)
100 90
1V
500mV
VOUTA (0.5V/DIV)
10
(0.5V/DIV)
500mV TIME (200s/DIV)
200s
Figure 73. Single-Supply, Half-Wave, and Full-Wave Rectifiers Using an OP291
Rev. D | Page 22 of 24
00294-077
VOUTB
0%
OP191/OP291/OP491 OUTLINE DIMENSIONS
5.00 (0.1968) 4.80 (0.1890)
8 5
8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496)
14 1 8 7
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440)
4 5.80 (0.2284)
6.20 (0.2441) 5.80 (0.2283)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10
1.27 (0.0500) BSC
1.75 (0.0689) 1.35 (0.0531)
0.50 (0.0197) x 45 0.25 (0.0098)
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
0.51 (0.0201) 0.31 (0.0122)
SEATING PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 74. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) [S-Suffix] Dimensions shown in millimeters and (inches)
0.775 (19.69) 0.750 (19.05) 0.735 (18.67)
14 1 8
Figure 76. 14-Lead Standard Small Outline Package [SOIC] Narrow Body (R-14) [S-Suffix] Dimensions shown in millimeters and (inches)
5.10 5.00 4.90
7
0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) MAX 0.015 (0.38) MIN 0.015 (0.38) GAUGE PLANE 0.430 (10.92) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
14
8
PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36)
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19
SEATING PLANE 0.005 (0.13) MIN 0.070 (1.78) 0.050 (1.27) 0.045 (1.14)
0.014 (0.36) 0.010 (0.25) 0.008 (0.20)
0.20 0.09
SEATING COPLANARITY PLANE 0.10
8 0
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
COMPLIANT TO JEDEC STANDARDS MS-001-AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 77. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
Figure 75. 14-Lead Plastic Dual In-Line Package [PDIP] (N-14) [P-Suffix] Dimensions shown in inches and (millimeters)
Rev. D | Page 23 of 24
OP191/OP291/OP491
ORDERING GUIDE
Model OP191GS OP191GS-REEL OP191GS-REEL7 OP191GSZ1 OP191GSZ-REEL1 OP191GSZ-REEL71 OP291GS OP291GS-REEL OP291GS-REEL7 OP291GSZ1 OP291GSZ-REEL1 OP291GSZ-REEL71 OP491GP OP491GPZ1 OP491GS OP491GS-REEL OP491GS-REEL7 OP491GSZ1 OP491GSZ-REEL1 OP491GSZ-REEL71 OP491GRU-REEL OP491GRUZ-REEL1 OP491GBC
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 14-Lead PDIP 14-Lead PDIP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP
Package Option R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] R-8 [S-Suffix] N-14 [P-Suffix] N-14 [P-Suffix] R-14 [S-Suffix] R-14 [S-Suffix] R-14 [S-Suffix] R-14 [S-Suffix] R-14 [S-Suffix] R-14 [S-Suffix] RU-14 RU-14 DIE
Z = Pb-free part.
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00294-0-4/06(D)
Rev. D | Page 24 of 24

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